The present invention relates generally to lighting devices such as electronic ballasts or LED drivers. More particularly, the present invention relates to lighting devices having a fast start circuit for rapidly starting a power factor correction controller and maintaining a power supply input voltage to the same.
A conventional lighting device 10 as represented for example in FIG. 1 may include an EMI filter 12 and a rectifier 14 coupled to receive, filter and rectify a mains AC input, respectively. The rectified mains voltage may then be provided via positive and negative DC voltage rails defining a bulk voltage (Vbulk) to a boost converter 20 of a power factor correction (PFC) circuit 16. The boost converter 20 is driven by a PFC controller 18 such as an integrated circuit (PFC IC), and as a result provides a converted voltage to an output stage of the lighting device 10. As but one example, the lighting device 10 may be an electronic ballast for powering a load such as one or more fluorescent lamps, in which case the output stage may include an inverter and associated control and protection circuitry. The lighting device 10 may alternatively be, for example, an LED driver for powering a load such as one or more LED modules or equivalent semiconductor light sources.
Marketing needs require short durations between the time when the mains AC voltage is applied to a lighting device and when the device subsequently drives up to ninety percent of an output current through the associated light source. The first step in generating the necessary output current is to develop the necessary voltage (Vcc) for starting up the PFC IC. However, conventional systems and methods for rapidly generating the PFC IC power supply (Vcc) often struggle with problems such as overheating of components, exceeding the voltage ratings of components, and properly maintaining the voltage to the PFC IC even where the primary power source for the PFC IC is otherwise inactive.
With reference to FIGS. 2-4, various topologies and methods may be described in accordance with previous efforts to address these problems.
FIG. 2 represents a simple resistor network coupled to the rectified mains voltage input to trickle current to the Vcc node (e.g., the PFC IC input terminal). One disadvantage to this approach is that this process constantly consumes power whether the primary source of current for the PFC IC is active or not. Also, because the resistor network is chosen to deliver just enough current to start the PFC IC and otherwise consume as little power as possible, this method requires a substantial amount of time to develop the voltage necessary to start the PFC IC. This further reduces the time allowed for the output current source to reach the target level, thus to some extent defeating the purpose for the circuit.
Referring now to FIG. 3, a switched resistor network coupled to a bulk voltage Vbulk drives current to a controller (such as an IC) that develops an unregulated voltage (Vdc) which is subsequently regulated (Vcc) and made available via a diode. Because the high side of the S2 reference voltage is referenced to ground, Vdc must be significantly higher than Vcc. This requires a voltage regulator Vreg capable of handling the power associated with the R_load current and the difference between Vdc and Vcc.
This method requires voltage Vdc to reach a level high enough to turn off S2. Vdc only increases when the boost converter is active, which further only occurs when Vbulk droops, which may happen as a result of, for example, loading from the Vbulk sensing networks and current limiting resistor R1. However, until Vbulk droops enough to cause the PFC IC to begin driving the boost converter, which will then supply current to the Vdc node, a large and potentially damaging current will flow through the current limiting resistor R1. Vdc will in such circumstances likely droop to a level at which point Vcc can, in turn, droop to an unsafe level.
A microcontroller or equivalent computing device may be used to turn on and off the main switch S1 controlling the current fed to Vcc. The computing device can provide hysteresis for this approach, but needs to be able to measure Vcc. This requires additional inputs to the computing device that may or may not be available. If the computing device has the required inputs and outputs, the computing device must be referenced to the same ground as the main switch S1. The primary controls of some electronic ballasts and drivers reside on an isolated section of the product with a different ground reference making this approach practically unusable.
Using this approach without hysteresis control can damage components if the computing device does not turn off the main switch S1 in time to protect the current limiting resistor R1.
Referring now to FIG. 4, in another alternative topology a second voltage sensitive switch S2 may be used to measure the rectified mains voltage Vbulk and turn off the main switch S1. Resistors R3, R4 define a voltage divider with respect to the rectified mains voltage Vbulk and are chosen to turn off the main switch S1 after the PFC IC has already begun to drive current through the boost converter.
Because this approach has no knowledge of the magnitude of the power supply Vcc, it is possible to turn off the main switch S1 before Vcc reaches a level sufficient to enable the output capacitor C2 to continue supplying current to the PFC IC and thereby maintain gate driving pulses to the primary switch of the boost converter. Because this approach lacks knowledge of Vcc, if the boost converter idles and the power supply source is inactive, Vcc can droop to an uncontrolled level. A common solution to this problem is to trickle current through a string of resistors from the rectified mains input. This will not only constantly consume power when the power supply source is active, but requires even more resistors consuming space on the printed circuit board.